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MM74HCT08 Quad 2-Input AND Gate
December 1983 Revised February 1999
MM74HCT08 Quad 2-Input AND Gate
General Description
The MM74HCT08 is a logic function fabricated by using advanced silicon-gate CMOS technology which provides the inherent benefits of CMOS--low quiescent power and wide power supply range. This device is input and output characteristic and pinout compatible with standard 74LS logic families. All inputs are protected from static discharge damage by internal diodes to VCC and ground. MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug-in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs.
Features
s TTL, LS pin-out and threshold compatible s Fast switching: tPLH , tPHL = 12 ns (typ) s Low power: 10 W at DC s High fan-out, 10 LS-TTL loads
Ordering Code:
Order Number MM74HCT08M MM74HCT08SJ MM74HCT08MTC MM74HCT08N Package Number M14A M14D MTC14 N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Logic Diagram
(c) 1999 Fairchild Semiconductor Corporation
DS005754.prf
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MM74HCT08
Absolute Maximum Ratings(Note 1)
(Note 2) Supply Voltage (VCC) DC Input Voltage (VIN) DC Output Voltage (VOUT) Clamp Diode Current (IIK, IOK) DC Output Current, per pin (IOUT) DC VCC or GND Current, per pin (ICC) Storage Temperature Range (TSTG) Power Dissipation (PD) (Note 3) S.O. Package only Lead Temperature (TL) (Soldering 10 seconds) 260C 600 mW 500 mW -0.5 to +7.0V -1.5 to VCC +1.5V -0.5 to VCC +0.5V 20 mA 25 mA 50 mA -65C to +150C
Recommended Operating Conditions
Min Supply Voltage (VCC) DC Input or Output Voltage (VIN, VOUT) Operating Temperature Range (TA) Input Rise or Fall Times (tr, tf) 500 ns
Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Note 2: Unless otherwise specified all voltages are referenced to ground. Note 3: Power Dissipation temperature derating -- plastic "N" package -12 mW/C from 65C to 85C.
Max 5.5 VCC +85
Units V V C
4.5 0 -40
DC Electrical Characteristics
VCC = 5V 10% (unless otherwise specified) Symbol VIH VIL VOH Parameter Minimum HIGH Level Input Voltage Maximum LOW Level Input Voltage Minimum HIGH Level Output Voltage VIN = VIH or VIL |IOUT| = 20 A |IOUT| = 4.0 mA, VCC = 4.5V |IOUT| = 4.8 mA, VCC = 5.5V VOL Maximum LOW Level Voltage VIN = VIH |IOUT| = 20 A |IOUT| = 4.0 mA, VCC = 4.5V |IOUT| = 4.8 mA, VCC = 5.5V IIN ICC Maximum Input Current Maximum Quiescent Supply Current VIN = VCC or GND IOUT = 0 A VIN = 2.4V or 0.5V (Note 4)
Note 4: This is measured per input with all other inputs held at VCC or ground.
Conditions
TA = 25C Typ 2.0 0.8
TA = -40 to 85C TA = -55 to 125C Guaranteed Limits 2.0 0.8 2.0 0.8
Units V V
VCC 4.2 5.2 0 0.2 0.2
VCC- 0.1 3.98 4.98 0.1 0.26 0.26 0.1 2.0 1.2
VCC- 0.1 3.84 4.84 0.1 0.33 0.33 1.0 20 1.4
VCC- 0.1 3.7 4.7 0.1 0.4 0.4 1.0 40 1.5
V V V V V V A A mA
VIN = VCC or GND, VIH or VIL
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MM74HCT08
AC Electrical Characteristics
VCC = 5.0V, tr = tf = 6 ns, CL = 15 pF, TA = 25C Symbol tPLH, tPHL Parameter Maximum Propagation Delay Conditions Typ 9 Guaranteed Limit 15 Units ns
AC Electrical Characteristics
VCC = 5.0V 10%, tr = tf = 6 ns, CL = 50 pF Symbol Parameter Conditions TA = 25C Typ 11 7 (Note 5) 38 5 10 10 10 18 15 TA = -40 to 85C TA = -55 to 125C Guaranteed Limits 23 19 27 22 Units ns ns pF pF
tPLH, tPHL Maximum Propagation Delay tTHL, tTLH Maximum Output Rise & Fall Time CPD CIN Power Dissipation Capacitance Input Capacitance
Note 5: CPD determines the no load dynamic power consumption. PD = CPD VCC2 f + ICC VCC and the no load dynamic current consumption, IS = CPD VCC f + ICC.
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MM74HCT08
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow Package Number M14A
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D
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MM74HCT08
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14
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MM74HCT08 Quad 2-Input AND Gate
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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